Integrator



Nov. 3, 1964 J. w` GRAY ETAL INTEGRATOR 2 Sheets-Sheet 1 Filed April 16,1959 INVENTOR.

JOHN W. GRAY HENRY L. HUNTER DI BY w@ ATTORNEY Nov. 3, 1964 J. w. GRAYETAL. 3,155,823

INTEGRATOR Filed April 16. 1959 2 Sheets-Sheet 2 if) A 4^ e4' INVENTOR.

JOHN W. GRAY HENRY L. HUNTER 'IE ATTORNEY United States Patent Oli ce3,155,823 Patented Nov. 3, 1964 This invention relates to electricsignal integrators and more particularly to electric signal integratorswhich furnish digital output signals representative oi the integral ofthe electric si'nals applied to the integrator input.

in many instances it is extremely advantageous to represent the timeintegral of a quantity or value in digital form since the integral maybe utilized more easily in that form. ln fact, many computers requiredigital inputs to perform the computations required.

Prior systems operate in either of two basic manners. One systemrequires the analogue signal to be digitized and then integrated by adigital integrator. The other system utilizes an analogue integrator andthen digitizes the result. Eoth systems have diierent disadvanta eslimitations.

The irst system has certain inherent l' itations placed on accuracysince analogue to digital transformation introduces an apprec le error.Fui more, digital integrator required is heavya bulky and subject to ahigh percentage of failures due to its multiplicity or parts and complexstructure. rlChe second system ii volves the use o'f electro-mechanicaldevices which are bulli heavy and subiect to saturation limitations.Both sysn tems are expensive to build and maintain due to either complexstructure or a multiplicity of parts.

@ne object of this invention is to provide a novel electric signalintegrator which supplies a digital output and which is compact, light,reliable, accurate, and inexpensive to manufacture.

Another object ot the invention is to provide a novel dirlerentialconverter for con erting a unidirectional voltage or current into tivoalternating voltages the instantaneous frequency dierence between wnichcorresponds to the instantaneous magnitude and direction of theunidirectional vo ge or current.

lc inve ion contemplates an electric signal tegrator comprising meansfor receiving an electric sifaal to be integrated and for providing twoalternating voltages, the instantaneous frequencies of which ditte-rfrom each other by an amount corresponding to the instantaneous value ofthe electric signal to be integrated; means connecte to saidalteri'iatinf7 voltages for providing output voltages, the magnitude,frequency, and phase of which correspend to the instantaneous value ofthe said frequency dit"- terence; and coun' g rneans responsive to saidoutput voltages lor providing a digital representation corresponding tothe integral of said output voltages.

foregoing and other objects and advantages of the invention will appearmore clearly from a consideration of the specification and drawingswherein one er^hod` ment of the invention is described and shown i..detail for illustration purposes ln the drawings:

FGURE l is a block and schematic circuit diagram of a novel integratorconstructed in accordance with the invention; and

is showing et alternating output voltages at terminals 4 and 5 have aninstantaneous frequency difference (f1-f2) which corresponds to theinstantaneous value of the analogue input signal. rl`hat is, themagnitude of frequency difference (fl-ulg) will correspond to themagnitude of the input signal and the algebraic sign of the frequencydifference will correspond to the polarity of the input signal.

The alternating voltage appearing at terminal 4 is applied directly toone input of a mixer 8; and to one input of a mixer 9 through a cosinegenerator 10. The alternating voltage appearing at terminal 5 is applieddirectly to the other inputs of mixers 8 and 9, respectively. Mixers Sand 9 are each arranged to provide an alterhating voltage having afrequency equal to the difference between the two frequencies applied attheir inputs. Thus, the output ot mixer is:

SD (fir-f2) and the output of mixer 9 is:

COS (f1-f2) I where t is time expressed in seconds and f1 and f2 are incycles per second.

Vifith this arrangement the phase of the output from mixer 9 remainsfixed and undergoes no change when f1 goes from larger than f2 tosmaller than f2. On the other hand, the phase of the output from mixer 8undergoes a phase reversal when f1 goes from larger than f2 to smallerthan f2.

rThe output from mixer 8 is applied to a trigger circuit il which may beof the Schmitt type and which provides two square wave outputs ofopposite phase which have the saine frequency and correspond in phase tothe output from mixer The outputs are labeled e2 and e3 and aregraphically shown in RG. 2 (b and c).

The output from mixer 9 is applied to another trigger circuit l2 whichprovides a single output el which is shown graphically in FlG. 2M).Output e1 corresponds in phase to the output of mixer 9. Trigger circuitl2 may not be required under most operating conditions and could in themajority of situations be replaced by a con ventional amplier.

The output el from trigger circuit l2 is applied to the plates ld and l5of triode Vacuum tubes lr6 and 17, respectively. The grids i8 and i9 oftubes i6 and 17 are connected to a source of negative potential 2i? byresistors 2l and 2,2, respectively, and to outputs e2 and e3 of triggercircuit ll 1oy coupling capacitors 23 and 24, respectively. Couplingcapacitors 23 and Z4 are small and differentiate the square wave outputse2 and e3 to obtain voltages e4 and e5 which are applied to grids 18 andi9, respectively. voltages e4 and e5 are shown graphically in FlG. 2 (dand e), respectively.

The cathodes 26 and 27 of tubes ld and 19 are connected to ground lbycathode resistors 28 and 29, respectively. An output pulse will resultat either cathode from a positive pulse at its grid if, and only if, itsplate is positive at the time. Negative grid pulses have no effect.Thus, depending on the phase relationship between el and (e2, e3) anoutput will develop across either cathode resistor 26 or 2?. That is, ifthe input signal to differential converter 3 is positive an outputhaving a frequency corresponding t0 the magnitude of the input signalwill be developed across one cathode resistor and should the polarity ofthe input signal change the output will transfer to the other cathoderesistor. ln both cases, however, the frequency of the output isdetermined solely by the magnitude of the input signal.

Cathode Zo is connected to one input Sti of a reversible binary digitalcounter 3l and cathode 27 is connected to a second input 32. Thetriggering arrangement of counter 3l is such that when one input has asignal the counter will add and when the signal is at the other inputthe counter will subtract. Therefore, the counter output represents inbinary digital form the integral of the input signal. Y

Counter 31 has n identical stages 35 and is of conventional design. VTwopulse stretchers 33 and 34 are connected between input terminals 30 and32, respectively, and the interstage and gates 36 to compensate for thetime delay in each stage of the counter and the first stage is feddirectly from the input terminals via an or gate 37. Each stage has asingle-input-driven bistable multivibrator that supplies twodifferentiated outputs which are alternately energized. One output isconnected to one input of an and gate 36 by a conductor 39 and the otheroutput is connected to one input of another and gate 36 by a conductor40. The other inputs of and gates 36 are connected to pulse stretchers33 and 34 by conductors 30 and 32', respectively. The outputs of andgates 36 are combined in'or gates 38 to trigger successive stages. Eachstage is sampled to determine what state it is in. The first stagefurnishes information relative to the value of the (2) digit, the secondinformation relative to the Value of the (21) digit, and the nthinformation relative to the value of the (2n-1) digit.

The first stage is triggered to its opposite stable state by a pulse oneither conductor 30 or 32. The succeeding stages are triggered to theiropposite states by preceding stage outputs in a manner which depends onthe location of the input pulse. If the input is via conductor 30', astage will be triggered only when a positive output is provided onconductor 39 of the preceding state; if on the other hand the input isvia conductor 32', a stage will be triggered only if a positive outputis provided on conductor 40 of the preceding stage. This type ofcontrolled triggering of successive stages yields the desired effect ofcounting up or down, as is obvious on consideration of the sequence ofbinary numbers, 000, 001, 010, 011, 100, 101, etc. The least significantdigit, which is generated by the first stage, always changes, whetherincreasing or decreasing by one count. When counting up, all digits butthe least significant digit change only when the next lower order digitchanges from l to O, but when counting down they change only when thenext lower order digit changes from to 1.

FIG. 2 (f and g) are similar to (d and e) but show the inputs to thegrids for an opposite polarity input signal. This illustratesgraphically how the output is changed from one cathode to the other toreverse the counter 31.

The novel differential converter 3 of FIG. 1 is particularly suited foruse in the integrator as shown but may be used in any equipment ofsystem requiring a differential alternating output from a direct currentinput. The converter has a resistor 40 connected between the inputterminal 2 and a high-gain direct-current differential amplifier 41which may be of the type described in Vol. 18 of the RadiationLaboratory series, by Valley and Wallman, on page 484. The junction ofresistor 40 and amplifier 41 is connected to ground via a smoothingcapacitor 42 which is utilized to prevent short term changes fromcausing oscillations.

One output of dierential amplifier 41 is used to drive an oscillator 43and the other an oscillator 44. Oscillators 43 and 44 generatefrequencies which are controlled by the magnitudes of the inputsthereto.

The output of oscillator 43 is used to operate a solenoid 46 whichactuates two identical switches 47 and 48 simultaneously. The switcharms are connected together by a condenser 49 and the normally closedcontacts 5f) and 51 of switches 47 and 48, respectively, are bothconnected to ground. The normally open contact 52 of switch 47 isconnected to the input of amplifier 41, and the normally open contact 53of switch 48 is connected to a source of positive potential 54. Withthis arrangement a charging current is applied to condensers 49 and 4 42when solenoid 46 actuates switches 47 and 48. The charging currentapplied is proportional to the frequency of oscillation of oscillator43, and tends to raise the potential input to amplifier 41.

The output of oscillator 44 is used to operate a solenoid 56 whichactuates two identical switches 57 and 58 simultaneously. The switcharms are connected together by a condenser 59, having a capacity equalto that of condenser 49. The normally closed contact 60 of switch 57 andthe normally open contact 63 of switch 58 are connected to ground. Thenormally open contact 62 of switch 57 is connected to the input ofamplifier 41 and the normally closed contact 61 of'switch S8 isconnected to source 54 and charges condenser 59 to the voltage of sourceS4. With this arrangement a discharging current is drawn from condenser42 when solenoid 56 actuates switches 57 and 58. The discharging currentis proportional to the frequency of oscillation of oscillator 44, andtends to lower the potential input to amplifier 41. Thus, when no inputvoltage is present at input terminal 2 Vboth oscillators will oscillateat the same frequency and the potential applied to the input ofamplifier 41 will be zero.

The outputs of amplifier 41 are chosen such as to increase the frequencyof oscillator 43 and decrease that of oscillator 44 when its inputpotental is positive. Thus equilibrium is restored by the oscillatorswith any input voltage at terminal 2, such that the amplifier inputpotential is substantially zero and the input current through resistor40 is just neutralized by the difference of the currents generated bycondensers 49 and 59. In this equilibrium condition, therefore, thefrequency difference will be a proportional measure of the input voltageand current, and will become negative when the input becomes negative.

While one embodiment only of the invention has been shown and describedin detail it is to be expressly understood that the invention is notlimited thereto.

What is claimed is:

1. An electric signal integrator comprising, means for receiving anelectric signal to be integrated and for providing two alternatingvoltages, the instantaneous frequencies of which differ from each otherby an amount corresponding to the instantaneous value of the electricsignal to be integrated; means connected to receive said alternatingvoltages for providing output voltages the magnitude, frequency, andphase of which correspond to the instantaneous value of the saidfrequency difference; and counting means responsive to said outputvoltages for providing a digital reprsentation corresponding to theintegral of said output voltages.

2. An electric signal integrator comprising, means for receiving anelectric signal to be integrated and for providing a pair of alternatingvoltages having an instantaneous frequency difference which correspondsto the instantaneous value of the said electric signal, means connectedto receive said alternating voltages for providing two pulsating outputvoltages each of which is a different function of the said frequencydifference, and reversible counting means responsive to said pulsatingoutput voltages for providing a digital representation corresponding tothe integral of said pulsating output voltages.

3. An electric signal integrator comprising, means for receiving anelectric signal to be integrated and for providing two alternatingvoltages having an instantaneous frequency difference corresponding tothe instantaneous value of the electric signal to be integrated; meansconnected to receivel said alternating voltages for providing twopulsating voltages having an instantaneous frequency substantially equalto the difference in frequency between the two alternating voltages anddiffering in phase by a predetermined amount, means connected responsiveto one ofrsaid pulsating voltages for supplying two pulsating gatingvoltages substantially out of phase with each other and which correspondin phase and frequency to the pulsating voltage applied to the said lastmentioned means for selectively gating said other pulsating voltage to acounter which provides a digital representation corresponding to theintegral or" the selectively gated pulsating voltage.

4. An electric signal integrator comprising, means for receiving anelectric signal to be integrated and tor providing two alternatingvoltages having an instantaneous frequency difference corresponding tothe instantaneous value of the electric signal to be integrated; firstand second mixers each having tirst and second inputs and one output;each ot said mixers providing at its output a voltage having a frequencysubstantially equal to the difference between the frequencies of twoalternating voltages applied to the mixer inputs; said mixers eachhaving their first input connected to receive one of the said mternatingvoltages; said first mixer having its second input connected to receivesaid other alternating voltage; means connecting said second mixersecond input to receive said other alternating voltage and for shittingthe phase or the alternating voltage applied to the said second mixersecond input; gate means having two inputs, two outputs, and two controlelements; said inputs being connected to said second mixer output; meansfor connecting said control elements to said iirst mixer output and forproviding two voltages at said control elements which correspond inphase and frequency to the first mixer output and are substantially 89out of phase with each other; and reversible counting means connected tothe gate outputs and arranged to count up when supplied by one gateoutput and count down when supplied by the other gate output.

5. An electric signal integrator as described in claim 4 wherein saidmeans for receiving the electric signal to be integrated includes adifferential amplifier which provides two voltages which varydifferentially when an input signal is applied thereto, a pair ofoscillators each controlled by a diterent one of said ampliier outputvoltages, and means providing feedback loops from the output ot eachoscillator to the input of the amplier for reducing the amplilierdifferential output to Zero in the absence of an input signal.

6. ln an electric signal integrator, a circuit for providing the inputto a counter means comprising, means for receiving an electric signal tobe integrated and for providing two alternating voltaves, theinstantaneous frequencies of which differ from each other by an amountcorresponding to the instantaneous value of the electric signal to beintegrated; and means connected to receive said alternating voltages forproviding output voltages the magnitude, frequency, and phase of whichcorrespond to the instantaneous value of the said frequency diil'erence.

7. ln an electric signal integrator, a circuit for providing the inputto a counter means comprising, means for receiving an electric signal tobe integrated and for providing a pair orr alternating voltages havingan instantaneous frequency dilerence which corresponds to theinstantaneous value of the said electric signal, and means connected toreceive said alternating voltages for providing two pulsating outputvoltages each of which is a different function of the said frequencydifference.

8. ln an electric signal integrator, a circuit for providing the inputto a counter means comprising, means for receiving an electric signal tobe integrated and for providing two alternating voltages having aninstantaneous frequency difference corresponding to the instantaneousvalue ot the electric signal to be integrated; means connected toreceive said alternating voltages for providing two pulsating voltageshaving an instantaneous frequency substantially equal to the diilerencein frequency between the two alternating voltages and diliering in phaseby a predetermined amount, and means responsive to one of said pulsatingvoltages for supplying two pulsating gating voltages substantially outor phase with each other which correspond in phase and frequency to thepulsating voltage applied to the said last mentioned means.

9. ln an electric signal integrator, a circuit for providing the inputto a counter means comprising, means for receiving an electric signal tobe integrated and for providing two alternating voltages having aninstantaneous frequency dilierence corresponding to the instantaneousvalue of the electric signal to be intergrated; first and second mixerseach having first and second inputs and one output; each of said mixersproviding at its output a voltage having a frequency substantially equalto the difference between the frequencies of two alternating voltagesapplied to the mixer inputs; said mixers each having their first inputconnected to receive one of the said alternating voltages; said rstmixer having its second input connected to receive said otheralternating voltage; means connecting said second mixer second input toreceive said other alternating voltage and for shifting the phase of thealternating voltage applied to the said second mixer second input; gatemeans having two inputs, two outputs, and two control elements; saidinputs being connected to said second mixer output; and means forconnecting said control elements to said rst mixer output and forproviding two voltages at said control elements which correspond inphase and frequency to the lirst mixer output and are substantially 189out of phase with each other.

1G. A circuit as described in claim 9 wherein said means for receivingthe electric signal to be integrated includes a dierential amplifierwhich provides two voltages which vary diierentially when an inputsignal is applied thereto, a pair of oscillators each controlled by adifferent one of said amplifier output voltages, and means providingfeedback loops from the output of each oscillator to the input of theamplifier for reducing the amplier differential output to zero in theabsence of an input signal.

References Cited in the file of this patent UNITED STATES PATENTS

6. IN AN ELECTRIC SIGNAL INTEGRATOR, A CIRCUIT FOR PROVIDING THE INPUTTO A COUNTER MEANS COMPRISING, MEANS FOR RECEIVING AN ELECTRIC SIGNAL TOBE INTEGRATED AND FOR PROVIDING TWO ALTERNATING VOLTAGES, THEINSTANTANEOUS FREQUENCIES OF WHICH DIFFER FROM EACH OTHER BY AN AMOUNTCORRESPONDING TO THE INSTANTANEOUS VALUE OF THE ELECTRIC SIGNAL TO BEINTEGRATED; AND MEANS CONNECTED TO RECEIVE SAID ALTERNATING VOLTAGES FORPROVIDING OUTPUT VOLTAGES THE MAGNITUDE, FREQUENCY, AND PHASE OF WHICHCORRESPOND